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Google ASIC Design Engineer Machine Learning Silicon United States, California, Mountain View 884368994
01.09.2024
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
- Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques.
- Experience working with microarchitecture or design of high-performance designs.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with computer architecture or memory subsystem architecture.
- Experience working with power, performance, and area trade-offs.
- Experience with accelerators (Machine Learning or GPUs) or similar high-performance designs.
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