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Apple ASIC Design Integration Engineer United States, California, San Francisco 874047202
06.06.2024
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Description
The ideal candidate will have experience in ASIC design with:- Architecture research and/or development of memory or highly interconnected system architectures.- RTL/micro-architecture.- Knowledge of high-performance memory subsystem, including dram controller, PHY architecture and design, DFI interface and dram interface calibration/training mechanisms and algorithms is a plus.- Systems experience in characterizing performance, doing comparison studies, and documenting and publishing results.
Key Qualifications
- Drive new memory system architectures from DRAM up.
- Explore architecture and feature trade-offs in system performance, area, and power consumption.
- Develop memory hierarchies for high performance parallel computer architectures. (system-on-a-chip SOC).
- Work with performance team to develop performance/power simulators, models and test suites.
Education & Experience
Bachelor's Degree + 0 Years of Experience
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $55.82 and $84.09/hr, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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