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Google Memory Controller Design Engineer India, Karnataka, Bengaluru 857332730
24.06.2024
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Minimum qualifications:
Preferred qualifications:
- Bachelor’s degree in Electrical Engineering, Computer Science, Computer Engineering, or equivalent practical experience.
- 4 years of experience with RTL design using Verilog/System Verilog and microarchitecture.
- 4 years of experience in ARM-based SoCs, interconnects and ASIC methodology.
Preferred qualifications:
- Master’s degree in Electrical Engineering or Computer Engineering.
- Experience in cross-domain, including domain validation, design for testing, physical design, and software.
- Experience with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation).
- Experience with Memory Controller.
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