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Nvidia Senior Layout Mask Design Engineer 
United States, Texas 
855020019

24.11.2025
US, CA, Santa Clara
US, MA, Westford
time type
Full time
posted on
Posted 5 Days Ago
job requisition id

What you'll be doing:

  • Perform physical layout for custom embedded SRAM structures in state-of-the-art FinFET and gate-all-around technologies using Cadence tools

  • Floor planning, custom layout, and verifying layout design rules and transistor-level schematics

  • Verify the robustness of your layout from a performance and reliability perspective

  • Communicating with P&R teams to determine optimal interface specifications between custom layout and standard cell-based logic

  • Lead and mentor other mask designers to improve team efficiency and align design methodologies

What we need to see:

  • Associates degree (or equivalent experience)

  • 8+ years of proven experience in mask design with FinFETs and/or gate-all-around process technologies

  • Deep understanding of digital and analog circuit layout concepts in ground breaking technologies

  • Strong background with Cadence custom circuit design tools, particularly Virtuoso

  • Knowledge of DRC and LVS checking flows such as ICV or Calibre, and extensive experience using these tools

  • Good communication skills and demonstrated team-centric decision making experience

Ways to Stand Out from the Crowd:

  • Custom SRAM mask design experience

  • SRAM compiler experience

You will also be eligible for equity and .