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QT Technologies Ireland Limited
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
Responsibilities Will Include:
Working on the physical implementation from floorplan to GDS for high-speed complex designs with aggressive PPA targets.
Taking part in the research of innovative methodologies for pushing the PPA limits in physical design, including the development of scripts and flows.
Working with cross-functional teams on understanding the design in context of physical implementation, timing closure and power optimization.
Demonstrating good understanding of and conducts research on industry trends and innovations in physical design to ensure solutions and deliverables align with best practices.
Performing complex analyses using statistics and data predictions to track benchmarks and identify issues or areas for improvement.
Working across teams to align on important areas of PPA improvement and ensure targets are met; ensures designs are innovative and compatible with highest standards.
What are we looking for?
4+ years of relevant experience in Physical Design.
Knowledge of entire PD flow from netlist to GDS (Floorplanning, Power planning, Placement/CTS/Routing and corresponding optimization steps).
Good experience and knowledge of tools for physical design implementation in advanced technologies nodes (10nm and below).
Excellent understanding of STA and timing closure methodologies, including impact on congestion/routing/power.
Good understanding of power analysis and power integrity analysis.
Understanding of Physical Verification and DRC closure.
Expert in automation skills using Perl and TCL and able to develop/support flows related to physical design.
Good communication skills and ability & desire to work in a cross-functional team environment.
Where you will be working
A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.
What's on Offer
Apart from working in an open, relaxed and collaborative space, you will enjoy:
Salary, stock and performance related bonus
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Relocation and immigration support (if needed)
Life, Medical, Income and Travel Insurance
Subsidised memberships for physical and mental well-being
Bicycle purchase scheme
Employee run clubs, including, running, football, chess, badminton + many more
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field.
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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