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Nvidia Senior ASIC Verification Engineer China, Shanghai 848212799
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The responsibility includes verification on sub-units functionality, integrations' signed-off, end-to-end verification, performance validation, etc
Different verification methodologies are embraced (like simulation and/or formal verification) to speed-up the working progress in a high efficiency way.
Participate in the research of verification methodology to improve automation and productivity to produce NVIDIA's new high-quality state of the art products.
Deploy the advanced verification methodology and infrastructure of the IP/SOC
What we need to see:
BS / MS in electrical / computer engineering and related or equivalent experience.
3+ years (MS) or 5+ years (BS) working experience on verification.
Consolidate understanding on verification concepts and UVM methodology.
Programming skills in System Verilog, Python, and C/C++.
Fully experienced verification flow, including testplan, test, coverage model, testbench, BFM modeling.
Deep understanding in Verilog and HVL (High-level Verification Language).
:
Sophisticated TB built experience & debug skills
Logical thinking & excellent summarize/expression skills
Knowledge of Makefile and tree infrastructure is a plus
Fluent English (both written and spoken) is a plus
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