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Google SoC Design Engineer Cloud United States, California, Sunnyvale 847072609
06.03.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 1 year of experience with RTL coding using Verilog/SystemVerilog.
- Experience with industry-standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips such as: EDA tools for simulation or synthesis.
Preferred qualifications:
- Master's degree in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience architecting RTL solutions employing software based construction, instantiation, customization and generation of RTL.
- Experience with SoC implementation standards and interfaces (i.e., AXI).
- Experience with scripting languages (i.e. Tcl, Python or Perl).
- Experience with Clock Domain Crossing, Reset Domain Crossing, RTL Linting and Logic Equivalence Checking.
- Understanding of digital design fundamentals, including synchronous and asynchronous logic, state machines, and bus protocols.
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