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Apple RTL Design Engineer United States, Texas, Austin 842391282
02.05.2024
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Key Qualifications
- Deep understanding of mixed signal concepts, along with RTL design fundamentals
- Deep knowledge of Verilog and System-Verilog
- Experience with front-end tools (Verilog simulators, linters, clock-domain crossing checkers)
- Working knowledge of synthesis, static timing, DFT is a huge plus
- Some working experience with System-Verilog assertions, checkers, and other design verification techniques
- Knowledge of SerDes, algorithm developments, scripting languages such as Perl and Python are plusses
- Strong communication, collaboration and presentation skills
Description
In this job you will gain the opportunity to specify micro-architecting digital blocks in advanced mixed-signal circuits. You will be also responsible for RTL coding of blocks specified by you or others. You will participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design verification team. You will participate in the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Education & Experience
BS degree in technical discipline with minimum 3 years of relevant experience.
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