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In this position, you will get the opportunity to build complex GPU and Tegra chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.
What you'll be doing:
Define and develop system-level methodologies and tools to build SOCs in an efficient and scalable manner
Identify inefficiencies and improvement opportunities in the front-end chip implementation process and propose ideas to tackle them
Own front-end design quality checks and reviews to present the physical design team with high-quality RTL
What we need to see:
BS or MS in Computer or Electrical Engineering or equivalent experience
5 plus years of proven experience in chip design, specializing in SOC integration and design automation.
Excellent analytical and problem-solving skills.
Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design/integration flow, and design automation.
Strong coding skills in Perl, Python, or other industry-standard scripting languages.
Great communication and teamwork skills to interact within the team and across functional teams to build consensus.
Experience in synthesis, padring, and physical design is a plus.
You will also be eligible for equity and .
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