Amazon Regional Environmental Engineer AWS Team 

Chile, Santiago Metropolitan Region, Santiago 

823852777

The Role:
In this role you will:
· Implement a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models
· Develop detailed test plans and write tests, run regressions, collect coverage matrices and report progress to the program
· Participate in the validation of FPGAs using test benches, which can be reused for the ASIC implementation
· Run formal verification of complex blocks to ensure functional correctness
· Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM, System C and DPI-C
· Develop a highly automated environment to run regressions that can be used to make builds and maintain organization of the database
Export Control Requirement:

- Bachelor's degree in Electrical / Communications Engineering or Computer Science, or related field, or equivalent experience
- 3+ years in verification preferably in communication systems
- 2+ years in UVM

- Master's degree in Electrical / Communications Engineering
- 5+ years in digital verification, preferably in communication systems
- Familiarity with Matlab
- Familiarity with formal verification techniques
- Strong written and verbal skills