Expoint - all jobs in one place

The point where experts and best companies meet

Limitless High-tech career opportunities - Expoint

Google ASIC Design Verification Engineer TPU Compute 
United States, California, Sunnyvale 
81667438

18.09.2024
Minimum qualifications:
  • Bachelor's degree in Computer Science, Electrical Engineering, a related field, or equivalent practical experience.
  • Experience with industry standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.
  • Experience with SystemVerilog (i.e., SystemVerilog Assertions or functional coverage).

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering.
  • 4 years of experience in design verification.
  • Experience in power aware verification, gate level simulations, and post silicon bring-up.
  • Experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog for Application-Specific Integrated Circuits (ASICs).
  • Familiarity with ASIC standard interfaces and memory system architecture.