You should have one or more of the following experiences and skills
- Experience with 300 mm wafer bonding / Cu interconnect process integration.
- Experience with Heterogeneous integration is a plus
- High degree of experience in semiconductor device integration, process development: prior experience at a leading a 300mm semiconductor FAB is a plus.
- Intermediate level of lithography alignment strategies
- Expert level of experience and knowledge of Silicon-CMOS integration: Back End of the Line (BEOL) and middle of line contact modules (MOL)
A degree in physics, material science/engineering or a related area is required. Bachelors degree with +8 years or Master’s degree with +5 years or Ph.D. with +4 years of silicon semiconductor related experience. Direct multi-skills in Si-CMOS (FEOL, MOL, BEOL, HI, bonding) process development is a plus: