Intel Senior IP Design Verification Engineer 

Malaysia, Penang 

814179742

Performs functional verification of IP logic to ensure design will meet specification requirements.

Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.

Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.

Replicates, root causes, and debugs issues in the pre-silicon environment.

Finds and implements corrective measures to resolve failing tests.

Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.

Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.

Maintains and improves existing functional verification infrastructure and methodology.

Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Bachelor or higher of Science degree in Electronics Engineering, Computer Engineering or equivalent with at least 7 years of relevant work experience.

Good coding skills on System Verilog, familiar with OVM/UVM methodologies and Perl Script.

Python is an added advantage.

Passionate to apply hardware and software engineering skillset to push verification, validation and regression testing to next efficiency level

Good problem-solving skills and a self-starter.

Hands-on experience with hardware and software debugging tools.

Ability to comprehend content of technical specifications for architecture, microarchitecture, registers, and schematic.

Highly motivated to learn IP architecture and new verification tools/flow/methodology and adapt to fast-changing technologies and environments.

Effective communication and collaboration skills.

Ability to work effectively in a cross-site team environment.

Experience with either SCAN/ATPG/IJTAG/MBIST relevant test verification or major industrial standard I/O interfaces such as PCIe/USB/Ethernet/AXI/AHB/APB is a plus