Engineers should possess a BSC or MSC degree in Electrical Engineering, Computer Engineering, Software Engineering or Computer Science. Additional qualifications include:
- At least 5 years of overall experience performing RTL Verification , logic design using System Verilog.
- Knowledge in Very Large-Scale Integration (VLSI) design and/or verification
- Experience in developing validation collaterals in emulation environment would be an added advantage
- Experience in developing Register Transfer Level (RTL) validation environment would be an added advantage
- Experience in working with Verilog/SVTB/OVM/UVM and Specman would be an added advantage
- Experience with Formal Verification CPU usage
- Familiarity with CPU X86 architecture
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits