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What you’ll be doing:
Invent and optimize new methods for high capacity detailed placement, especially for maximizing the performance of datapath logic within a suite of internal optimization tools. These tools already outperform the industry's alternatives in high capacity timing optimization and will advance even further with your contributions.
Over time, this role can expand to other areas of physical design implementation and analysis tools
As with any software engineering team, we do write a lot of code, but this is broader than a typical CAD or EDA role. Instead, we as a team own the whole process from discovery and invention of new optimization opportunities, to developing solutions and working directly inside design teams to facilitate deployment.
What we need to see:
MS or PhD in Electrical Engineering or Computer Science (or equivalent experience)
5+ years experience in one or more of these areas: place & route, spatial data structures, and design optimization.
Expertise in C++
Thorough understanding of detailed placement, including incorporation of routing and timing algorithms.
Deep understanding of algorithm design principles such as complexity analysis, efficient memory and I/O use, etc.
Strong communication and interpersonal skills
Ways to stand out from the crowd:
Expertise in high speed arithmetic design
C++17/C++14 experience, such as lambdas and concurrency
Experience in parallel computing, especially if you have used CUDA
Experience with reinforcement learning, GNNs (Graph Neural Networks), LLMs (Large Language Models) and other relevant machine learning frameworks, especially as applied to physical design
You will also be eligible for equity and .
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