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Intel F9 WLA Process Integration Yield Engineering Manager United States, New Mexico, Albuquerque 812711082
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As a Process Integration and Yield Engineering Manager, you will manage a team of Wafer Level Assembly (WLA) process integration/yield engineers who drive yield, defect, and quality improvement activities to meet targets. The Process Integration and Yield Engineering Manager is responsible, but not limited to:
- Proactively identifying risk and opportunity, based on in depth understanding of process flow, product architecture, process interactions, process equipment and effective research of industry literature.
- Overseeing the local change control process and review board.
- Leading a team which is capable of effectively triangulating process flow, electrical/test information, and physical FA to form complete physical models and risk assessments across technologies.
- Responding urgently to factory excursions, determining root cause, and implementing solutions which address the underlying sources of the problem and proactively applying the solution to other modules.
- Oversees excursion management processes and exhibits leadership amidst complex and impactful material review boards.
- Working with internal and external customers to identify, assess, and mitigate quality risks.
- Understanding new technologies and novel foundry yield characterization techniques as needed.
- Supporting technical interactions with internal and external customers.
- Partnering with Technology Development (TD) team to design and transfer robust technologies to HVM.
- Generating and driving critical program and technology roadmaps to ensure world class cost and quality products.
The ideal candidate should exhibit the following behavioral traits:
- Strong technical and troubleshooting skills.
- Strong verbal and written communication skills.
- Demonstrated capability working in a high performing team culture which includes excellent teamwork and leadership skills, demonstrated problem solving and prioritization skills.
- Willingness of being both collaborative and critical.
- Willingness presenting information clearly and effectively to multiple audiences with varying degrees of technical background.
- Willingness working autonomously with minimal oversight or coaching.
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Candidate must possessat least oneof the following 3 degrees; plus, the years of experience required for each degree in the areas specified below:
- Bachelor's degree in an Engineering or Physics, Electrical Engineering, or a related field of study with 6+ years of experience.
- Master's degree in an Engineering or Physics, Electrical Engineering or a related field of study with 4+ years of experience.
- PhD degree in an Engineering or Physics, Electrical Engineering or a related field of study with 2+ years of experience
- 5+ years of Semiconductor fabrication (or packaging) experience.
- 2+ years of collaboration experience with defect inspection, failure analysis, integration, and module engineering.
- 2+ years of experience with statistical analysis tools such as JMP.2+ years of experience interpreting product data including inline parametrics, defect and SORT data, finding failure root cause and inline indicator and driving for solutions.
Preferred Qualifications:
- 3+ years management experience.
- Experience in new semiconductor technology development.
- Experience in data analysis and statistical process control (JMP, SQL, PCS)
- Fundamental understanding of semiconductor process flow.
- Understands concepts of process capability, true spec, and variance.
- Demonstrated leadership experience in factory level projects and executing projects in a timely manner.
- Knowledge on inline inspection method, electrical test structures and SORT programs.
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