Intel Analog Circuit Design Engineer 

India, Karnataka, Bengaluru 

80236220

As an Analog Circuit Design Engineer, you'll be responsible for but not limited to the following

• Design and optimize high-speed transceivers (Tx/Rx) including equalization circuits (FFE, CTLE, DFE) for various protocols like DDR, DDR, PCIe, and Ethernet.
• Develop analog circuits like clock data recovery (CDR), PLLs, DLLs, and low-power clock buffers for high-speed data paths.
• Perform detailed circuit simulations to analyze signal integrity, power consumption, and noise characteristics
• Collaborate with layout designers to ensure optimal placement and routing of critical I/O circuits, considering signal integrity and power integrity concerns.
• Conduct thorough design verification through simulations and analysis to validate functionality and meet performance specifications
• Perform post-silicon characterization to evaluate I/O performance and fine-tune design parameters.
• Collaborate with system validation teams to ensure I/O functionality in the complete system environment

You must possess the below minimum qualifications to be initially considered for this position.

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates

Minimum Qualifications:

PhD degree with 1+ years of experience in Electrical Engineering, Microelectronics, Engineering Physics, or other or related field

Bachelor’s or Master’s degree in Electrical/Electronics Engineering or a related field.

3+ years of experience in analog circuit design, including hands-on experience with the full product development lifecycle.

Proficiency in using design and simulation tools like Cadence, Mentor Graphics, or Synopsys.

Preferred Qualifications:

Experience in designing for low power, high speed, or high precision applications.

Familiarity with industry standards and compliance requirements (e.g., EMI/EMC, ESD).

Knowledge of mixed-signal design and integration with digital circuits is a plus.