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What you'll be doing:
Develop test plans, tests and verification infrastructure for verifying global IP across multiple products
Define, develop, and automate flows and methodologies to efficiently build, deploy, and verify generated RTL
Ensure code and functional coverage of all the RTL which you will verify
Build verification components using SV/UVM methodology
Driving coverage-based verification closure
Collaborate with design teams across NVIDIA to find corner cases and resolve verification related issues
What we need to see:
BS/MS in Electrical or Computer Engineering (or equivalent experience)
5+ years of proven design verification experience
Experience in pre-silicon verification (UVM, SystemVerilog), ASICdesign/implementationflow, and design automation
Programming and scripting experience in Perl or Python
Excellent debugging and analytical skills
Exposure to design and verification tools (dc_shell or equivalent synthesis tools, VCS or equivalent simulation tools, debug tools like Debussy, GDB)
Strong communication and collaboration skills to interact within the team and across functional teams
Ways to stand out from the crowd:
Previous experience automating tasks in the design verification process
Hands on experience in object-oriented programming
Prior design or verification experience at the IP or block level
Experience developing methodologies used by others
Demonstrated ability to drive a project to completion
You will also be eligible for equity and .
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