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Google Chip Packaging Technologist 
United States, California, Sunnyvale 
796160932

06.03.2025
Minimum qualifications:
  • Bachelor's degree in Materials, Mechanical, Electrical Engineering, a related engineering field, or equivalent practical experience.
  • 5 years of experience with advanced packaging technologies for HPC applications, including 2.5D/3D packaging.
  • Experience with package integration or a similar role.

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture, or a related field.
  • Experience with HBM memory packaging and its integration into the packaging solution.
  • Experience with high-volume manufacturing processes and yield improvement.
  • Experience with assembly houses or wafer foundries.
  • Understanding of multidisciplinary interactions between packaging technology, chip package electrical design, thermal and mechanical performance and manufacturability/reliability.
  • Understanding of advanced foundry process nodes and their interactions with package reliability and different package technologies.