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Amazon Post-Silicon Validation Engineer 
United States, Texas, Austin 
792625433

16.09.2024
DESCRIPTION


As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of our next generation Machine learning Training and Inference Accelerators that are deployed in AWS data centers.Key job responsibilities
* Responsible for validating the system architecture for the next gen Machine Learning Acceleration (MLA) product family using emulation/prototyping platforms.
* Collaborate with design, software & architecture teams and develop in-depth architecture validation plans
* Focus on SW integration, Usecases, Performance, Reset and Deadlock testing.
* Develop methodologies and robust infrastructure for test development, execution and reporting.
* Execute on the validation plans, debug and meet the criteria for successful tapeout.
* Provide technical leadership through personal example, mentorship, and strong teamwork.About the teamDiverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.
About AWSInclusive Team CultureWork/Life BalanceMentorship & Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.


BASIC QUALIFICATIONS

- Bachelor's degree or higher in Electrical Engineering, Computer Engineering, Computer Science or equivalent
- 7+ years of experience in either Pre or Post silicon validation.
- 4+ years of experience using Emulation or FPGA prototyping platform.
- 5+ years experience in C/C++.
- Experience on Testplan development and Test Infra development.
- Good understanding of HW Architecture and SW stack integration.