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Meeting Area, Frequency and Power requirements are some of the most meaningful activities in CPU development. We work closely with micro-architecture designers and standards cells/Macro designers to build and improve metrics and quality of designs, targeting 3nm and below technology nodes.
As member of the CPU implementation team, you will work to identify critical paths and timing bottlenecks across IP development, enabling accurate trade-off between the various performance metrics of the designs (frequency, IPC, power, area).
Are recently graduated, or soon to graduate from a University or Engineering School, in Electronic Engineering or Computer Science. A prior internship in a similar field would be beneficial. We are also looking for:
We encourage early applications as we review them on a first come/first served basis.
In Return:In addition to a competitive salary and , you'll also receive the support, autonomy and opportunity to excel in your career.
With a mid-year, and year-end review you'll have two windows each year to progress recognizing the pace at which you could grow. Attend our "Grad-teach-Grads" workshops, guest speaker series and various social events to expand your knowledge. Want to take this a step further? Join our Graduate Committee and home in on your planning, networking and co-ordination skills.
You'll also be invited to our best-in-class Global Graduate Conference (GGC)! A yearly occurrence exclusive for Graduates allowing you to hear from executive members, inspiring speakers and make connections for life.
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