Intel Power Validation Optimization Engineer 

Israel, Haifa District, Haifa 

783129422

What you'll be doing:

• you will be responsible for analyzing full chip and unit-level power data and driving the PHY/BE/FE ASIC teams to improve their units' power efficiency.
• You will be responsible for researching, developing, and deploying methodologies to help INTEL CCD's products become more energy efficient.
• Key responsibilities include developing techniques to model, analyze, and reduce power consumption of INTEL CCD's product line.
• Collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis and reduction techniques for INTEL CCD's next generation products.
• Analyzing of Low voltage power supplies systems (AC-DC)
• Hands on lab and testing experience.

Bsc Electrical Engineer.
related fields experience 2-4 years.
Board designer, layout, lab, and debug, SW, FW experience - advantage.
Desire to bring data-driven decision-making and analytics to improve our products.
High abilities to driven for best power consumptions.
Strong understanding of concepts of energy consumption, estimation, data movement and low power design.
Good and interpersonal skills; much collaboration with design teams is expected.
Desire to bring data-driven decision-making and analytics to improve our products.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits