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Google Silicon Micro-architecture RTL Lead Google Cloud India, Karnataka, Bengaluru 782881343
04.09.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 10 years of experience in ASIC development with Verilog/SystemVerilog, Vhsic Hardware Description Language (VHDL).
- Experience in micro-architecture and design IPs and Subsystems.
- Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).
Preferred qualifications:
- Experience with scripting languages (e.g., Python or Perl).
- Experience in SoC designs and integration flows.
- Knowledge of bus architectures, fabrics/NoC, processor design, accelerators, or memory hierarchies..
- Knowledge of high performance and low power design techniques.
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