Dell Electrical Senior Engineer_FPGA_Design & Verification 

India, Karnataka 

780190371

Electrical Senior Engineer

Our Electrical Engineering team puts the spark into the full hardware development lifecycle, from concept to production. It takes experts in system architecture definition, design, analysis, prototyping, sourcing & the debugging and validation of layouts or routes to deliver state-of-the-art products for a changing world. We work closely with designers, cross-functional teams within Dell Technologies and suppliers to make sure electronic designs meet a range of requirements, including schedule, feature set, functionality and quality, as well as industry standards.

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What you’ll achieve

Our global Field-Programmable Gate Array (FPGA) team puts the spark into the full hardware development lifecycle, from concept to production. It takes experts in system architecture definition, design, analysis, prototyping, sourcing & debugging and validation of layouts or routes to deliver state-of-the-art products for a changing world. We work closely with designers, and cross-functional teams within Dell Technologies and suppliers to ensure electronic designs meet a range of requirements, including schedule, feature set, functionality, quality, and industry standards.

You will:

• Design next-generation HW features in partnership with front-end teams and industry partners
• Drive feature and cost trade-off analysis to provide technical recommendations
• Provide design guidance to enable and support global teams
• Deliver assigned system interfaces with design and process across extended teams
• Prepare documentation for inspection/testing procedures

Essential Requirements

• Experience: 5-8 years in FPGAsystems design and verification with Verilog coding, System Verilog, and VHDL coding practices.
• Experience inUVM Verification framework,Assertion based Verification, Code coverage, Unit level simulations.
• Experience in digital design methods such as CDC (Clock Domain Crossing), RDC (Rest Domain Crossing), timing constraints definition, and static timing analysis.
• Experience in RTL Design Digital Design Principles and x86 Core or ARM processor architecture.
• Experience inPeripheral Protocols like I2C, I3C, SMbus, IPMI, IPMB
• Strong fundamentals in both analog and digital design practices with a desire to share knowledge and mentor others
• Experience and deep knowledge of hardware and software interactions, and ability to apply this understanding to resolve issues.

Desirable Requirements

• Experience in x86(AMD & Intel) and ARM architecture.
• Experience with FPGA development tools like XILINX, Lattice, and Altera Quartus.(Modelsim/QuestaSim)