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As an IP Design Engineer, you will work with a team of engineers to develop and verify state-of-the-art memory interface, chip-to-chip, or transceiver-based IP cores. You will be working on advanced device architectures, design definition, implementation, and verification. You will also be developing design examples and simulation models, accompanied by a rich set of technical documentation. Your specific responsibilities will include, but are not limited to the following:
Architecture and Design based on the latest protocol specifications for memory, chip-to-chip, or transceiver interfaces.
RTL development.
Device support and CAD tool integration.
Verification (e.g. verification IP, methodologies, frameworks, bus functional models, regression tests).
Hardware power-on and debug.
New product release and rollout support.
Customer technical support.
The candidate should possess the following behavioral traits:
Excellent skills in communication, initiative, innovation, and teamwork.
Highly motivated to learn and adapt to fast-changing technologies and environments.
Excellent problem-solving skills and attention to detail.
Demonstrate fundamental values such as accountability, integrity, and a winning mindset.
Collaborative mindset, strong influencing skills, and a willingness to work across geographical locations.
This is an entry level position and will be compensated accordingly. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
Minimum Requirements:
1+ years of experience in the following:
Digital logic hardware (e.g. System Verilog, Verilog and/or VHDL) design or verification.
Software programming or scripting (e.g. C/C++ and/or Python).
Preferred qualifications:
FPGA design experience.
Experience with RTL simulation, timing closure, or STA.
Experience with Memory Interfaces, High-speed ADC/DAC, or Transceiver Protocols (e.g. Ethernet, PCIe).
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