As a formal verification engineer working the complete formal verification for single or multiple design blocks and IP’s (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.), you will be responsible for: - Working with Apple Silicon's world-class SOC and IP design engineers to develop a formal micro-architecture specification- Developing comprehensive formal verification test plan- Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro-architecture.- Crafting novel and creative solutions for verifying complex design micro-architectures- Developing and implementing re-usable and optimized formal models and verification code base- Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity.