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Qualcomm Interim Engineering Intern- HW 
India, Tamil Nadu, Chennai 
762136346

23.06.2024

Job Area:

Interns Group, Interns Group > Interim Engineering Intern - HW

SOC & Hard Macro Physical Design

• SOC Validation & Debug

• RF & Analog Layout

• RF/Analog/Mixed Signal/Power IC Design

• Low Power Design

• Board and FPGA Design

• Digital ASIC Design

• Design/SOC Verification

• CAD Solution Engineer

• Design for Test (DFT)

• CPU Design

Must have educational background in one or more of the following areas:

• Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs.

• Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge

• Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus.

• Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design.

• Excellent analytical and problem solving skills.

• Ability to collaborate and work in teams.

• Good verbal and written communication skill

Educational Background:

Masters, Bachelors: Electrical Engineering , VLSI , Embedded and VLSI , ECE

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.