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Job Area:
Engineering Group, Engineering Group > Systems Engineering
The successful candidate must possess internal drive and a keen desire to learn on the job. You will work within a multi-disciplinary, multi-site team of architects, designers and verification engineers and will be responsible for the IP design development and integration within the display sub-system.
Minimum Qualifications:
• Bachelor's degree in Engineering, Information Systems, Computer Science, or related field.
Principal Duties and Responsibilities:
Working with DPU architecture teams to define, document and implement DPU models
Integrate display IP Cmodels to the display ASIC verification environment
Collaborate with SoC architects, display hardware and software teams to evaluate new features and understand design tradeoffs.
Analyze simulation results to identify bottlenecks and opportunities for improvements.
Present analysis results and provide recommendations.
Provides software configuration libraries
Minimum Qualifications:
3+ years experience with C/C++ Programming Language.
3+ years experience with scripting languages (Perl or Python)
Experience debugging complex system C models.
Critical thinking, analytical and organizational skills are mandatory.
Strong presentation and communication skills.
Preferred Qualifications:
Understanding of ASIC/VLSI concepts
ASIC design and verification: VHDL, Verilog, System Verilog
Experience of c-modeling tools, including C/C++, SystemC, Excel
Experience debugging complex system C models.
Strong technical background in display
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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