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Job Area:
Engineering Group, Engineering Group > ASICS Engineering
You will contribute to evaluate performance of future envisioned hardware architectures and providing key data points to decision makers. You will participate to develop a key architecture modeling platform and support its continuous improvement.
Responsibilities
In your role, you will:
Participate in architecture exploration campaigns working closely with key architects from various teams. Analyze complex dataset to identify insights and patterns that will help define the requirements for next-generation SoCs
Support on exploratory methodology projects, involving machine learning, data science, etc.
Expand, maintain and document innovative modeling frameworks. Participate in defining a new hardware modeling semantic, breaking up with conventional hardware programing languages.
Skills/Experience
Robust understanding of computer architecture and memory hierarchy
Strong knowledge of Object Oriented Programming (C++, Python)
Interest for programming paradigms
Knowledge in bus components micro-architecture
Understanding of performance/power/area tradeoff.
Ability to quickly react and adapt to changes.
Excellent communication skills.
Requirements
Degree in Microelectronics, Computer Science, or related field.
Preferably 2-5 years of solid experience in SoC modeling and/or software development, new graduated will be considered upon strong internships & motivation.
Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite/NoC concepts.
Experience in Data Science, Machine Learning
Preferred Qualifications
Master’s or PhD degree in Microelectronics, Computer Science, or related field.
Strong Mathematical background
Knowledge in network traffic engineering
Knowledge of Memory Controller, LPDDR & DDR protocols
Experience with performance verification and driving microarchitecture investigations on blocks like memory controller, CPU, GPU, NoC and multi-media is a plus
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range:
$108,000.00 - $162,000.00
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