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Apple GPU Physical Design Engineer STA/Timing United States, Texas, Austin 73385958
02.05.2024
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Key Qualifications
- We are looking for candidates with 10+ years of hands-on experience in STA and timing closure, including:
- Able to lead STA efforts by working with multi-disciplinary teams.
- Drive to identify different things that can affect timing closure and be proactive to develop solutions.
- Familiar with STA concepts and good understanding of cross-talk, OCV, noise, etc.
- Experience with analysis of large volume data, identifying and driving fixes, generating and providing ECOs for timing closure.
- General knowledge in one or more multi-functional areas like DFT, synthesis, PD, clocking is preferable.
- Be a strong teammate, good communicator and able to work with others driving timing closure and influencing the best design practices to improve efficiency.
- Have programming skills with TCL and Primetime APIs. Exposure to Python/Perl would be added advantage.
- STA lead experience would be an added advantage.
Description
- Identify dependencies and roadblocks for different STA items very early on and ensure a smooth execution of timing closure.- Participate in analysis leading to the definition of next generation products.- Setting up all DFT modes and making sure all test features are properly timed.- Assemble the top level design for STA ensuring accurate analysis by reviewing all the logs and reports.- Run ECO flows on the design and responsible for close timing.- Drive and support tapeout activities by running a full suite of signoff checks to ensure a high quality silicon for manufacture.- Work with CAD and Vendors to constantly improve the flow and bring in groundbreaking features to the analysis flows.
Education & Experience
We are looking for candidates with BS + 10 years of relevant experience.
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