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Google Staff RTL Design Engineer DDR Controller India, Karnataka, Bengaluru 715152623
14.10.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 10 years of experience in micro-architecture and coding in one or more of the following areas: memory compression, interconnects, coherence, cache, DRAM controller, Physical Layer Devices (PHYs).
- Experience with multiple quality checks performed at front-end including Lint, CDC/RDC, Synthesis, LEC, etc.
- Experience with Verilog or System Verilog.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science.
- 16 years of experience in micro-architecture and coding in one or more of the following areas: memory compression, interconnects, coherence, cache, Dynamic Random Access Memory (DRAM) controller, PHYs.
- Experience with micro architecture design with the knowledge of system design to develop optimized IPs with PPA.
- Experience with chip design flow and with the knowledge of cross-domain involving Design Verification (DV)/Design for testing (DFT)/Physical Design/Software.
- Experience in performance design, Multi power domains with clocking and multiple System on a chip (SoCs) with silicon.
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