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Google ASIC Design Verification Engineer Silicon India, Karnataka, Bengaluru 714966631
05.02.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering or Computer Science or equivalent practical experience.
- 2 years of experience in verifying digital logic at RTL using System Verilog for FPGAs and ASICs.
- Experience with UVM Tesbenches or environments.
Preferred qualifications:
- Master's degree in Electrical Engineering or Computer Science with 6 years of relevant experience or a Bachelor’s degree with 8 years of experience.
- Experience with Advanced Microcontroller Bus Architecture (AMBA) (e.g., Android Play Books (APB), Advanced eXtensible Interface (AXI), App Campaigns for Engagement (ACE) or other standard protocols.
- Expertise in creating/using verification components and environments in UVM methodology at IP or Subsystem level.
- Experience with image processing, computer vision or machine learning IPs.
- Familiarity with CPU, GPU or other computer architectures.
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