Nvidia Senior STA Engineer Sub-Chip 

Israel, North District 

70157387

What you'll be doing:

• Perform advanced Static Timing Analysis (STA) for HSIO at chiplet and FC level.
• Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
• Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.
• Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.

What we need to see:

• B.SC./ M.SC. in Electrical Engineering.
• At least 4+ years of hands-on STA experience.
• Experience in Prime Time and signoff methodologies.
• Excellent leadership capabilities.

Ways to stand out from the crowd:

• Knowledge in physical design flows and methodologies (Synthesis, PNR, DFT designs).
• Trong background of Prime time tool.
• Great teammate.