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Apple RTL Design Engineer United States, California, San Diego 693800525
28.03.2024
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Key Qualifications
- Deep knowledge of mixed signal concepts, along with relevant experience in logical/RTL designs
- Deep knowledge of Verilog and SystemVerilog and front-end tools (Verilog simulators, linters, clock-domain crossing checkers)
- Shown knowledge of synthesis, static timing, DFT, is a plus
- Some working experience with SystemVerilog assertions, checkers, and other design verification techniques are a plus
- Prefers to have some working knowledge of scripting languages such as Perl and Python
- Strong communication and presentation skills, leadership and management skills are all plusses
Description
In this highly technical role, you will be responsible for specifying and/or micro-architecting digital blocks in sophisticated mixed-signal circuits. You will be also responsible for RTL coding of blocks specified by you or others. You will participate in the design verification and bring-up of such blocks by writing significant assertions, debugging code, and otherwise interacting with the design verification team. You will participate in the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Education & Experience
BS degree in technical discipline with minimum 10 years of relevant experience.
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $161,700.00 and $284,900.00, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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