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QT Technologies Ireland Limited
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
About The Role
What you will be doing:
Micro-architect and design RTL for blocks and modules of Adreno GPU architecture across shader processing, graphics pipelines, memory subsystem and interconnect, and power and system level design
Identify advanced ways to optimize hardware design for better performance, power, and cost
Evaluate the hardware feasibilities of complex algorithms and requirements
Develop micro architecture and specification of the new generation design
Develop RTL for the corresponding micro architecture
Provide essential verification and debugging activities for the corresponding design throughout the entire project cycles
Optimize the silicon cost and improve clock speed
Troubleshoot silicon issues with products relevant to the corresponding design
What are we looking for?
The team looks for wide range of level and experience, typically from 3 years to 20 years.
Experience with Verilog/SystemVerilog design, Synopsys synthesis, low power design, test plan development, coverage-based design verification
Experience with Computer Architecture, Computer Arithmetic, Low power design, C/C++/Python programming languages is desired.
Experience in designing RTL for GPU, CPU, DSP, Machine-Learning, cache, controller, video, display, camera blocks in ASIC is desired.
Exposure to Graphics API (OpenGL, Vulkan, Direct3D, etc) is big plus
Good communication skill and desire to work as a team player
Where you will be working
A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.
What's on Offer
Apart from working in an open, relaxed and collaborative space, you will enjoy:
Salary, stock and performance related bonus
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Relocation and immigration support (if needed)
Life, Medical, Income and Travel Insurance
Subsidised memberships for physical and mental well-being
Bicycle purchase scheme
Employee run clubs, including, running, football, chess, badminton + many more
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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