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Google Silicon Senior Design Verification Engineer TPU Google Cloud 
India, Karnataka, Bengaluru 
682994175

18.09.2024
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering or equivalent practical experience.
  • 5 years of experience with verification methodology such as UVM/OVM/VMM.
  • 3 years of experience in the verification of IP designs such as CPU, Peripherals, PMU, etc.
  • Experience with SystemVerilog, SVA and functional coverage.

Preferred qualifications:
  • Master's degree in Electrical Engineering or a related field.
  • 10 years of experience in Verification, verifying digital logic at RTL level using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or ASICs.
  • Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
  • Experience creating and using verification components and environments in standard verification methodology.
  • Experience with ASIC standard interfaces and memory system architecture.
  • Experience in verification of AI/ML Accelerators.