Analog Mixed-signal Serdes Design Engineer jobs at Apple in United States, California, Cupertino
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United States
California
Cupertino
628 jobs found
17.05.2024
A
Apple High Speed Analog/Mixed-Signal IC Design Engineer United States, California, Cupertino
Proven track record in high-speed analog/mixed-signal architecture and circuit design and productization. Deep understanding of PLL and clocking fundamentals and solid understanding of phase noise, jitter analysis/budgeting and loop dynamics....
Strong experience in analog and mixed-signal circuit modeling, design, or architecture. Solid understanding of behavioral modeling techniques, model parameter extraction, and model calibration. Strong analytical and problem-solving skills to debug...
You should have architecture, design, and production expertise in the following areas:. High-speed wireline transceiver architectures and circuits. High-speed memory interface architectures and circuit. High-speed data converter architectures and circuits....
You should have architecture, design, and production expertise in the following areas:. High-speed wireline transceiver architectures and circuits. High-speed memory interface architectures and circuit. High-speed data converter architectures and circuits....
Preferred validated experience in IP design integration and implementation with multiple clock domains and multiple power domains. Deep knowledge and experience in various tools such as RTL simulation, lint, logic...
Proven track record in high-speed analog/mixed-signal architecture and circuit design and productization. Deep understanding of PLL and clocking fundamentals and solid understanding of phase noise, jitter analysis/budgeting and loop dynamics....
Proven experience in analog IC design. Multidisciplinary; being able to work on a large range of analog related topics. Hands-on design expertise in at least 3 of the following areas:...
Proven track record in high-speed analog/mixed-signal architecture and circuit design and productization. Deep understanding of PLL and clocking fundamentals and solid understanding of phase noise, jitter analysis/budgeting and loop dynamics....
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