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Apple Analog Mixed-Signal SerDes Design Engineer United States, California, Cupertino 679457969
01.06.2024
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Description
The Analog Mixed Signal SerDes Design Engineers work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO) with best in class power, performance, and area (PPA). You will have the opportunity collaborate with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create block-level specifications, and execute on transistor-level implementation and behavioral modeling. They drive mask design to implement layout view of designs. As Analog Mixed Signal SerDes Design Engineers, you will also work closely with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex IPs, on regular basis you will interact with your peers/management to communicate progress and discuss new ideas making it a lively and interactive work environment!
Key Qualifications
- The ideal candidate should have deep knowledge of analog mixed-signal design with experience in high-speed serial links.
- Solid understanding and experience of designing analog mixed-signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters
- Proven understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
- Good grasp and understanding of digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops)
- Experience with high speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid knowledge of digital design concepts
- Knowledge of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 20+ Gbps NRZ and PAM applications
- Knowledge of CDR architectures and implementations
- Knowledge of lab equipments and testing
- Experience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS)
- Hands-on experience in advanced CMOS technologies, design with FinFet technology
- Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization
- EXPERIENCE IN THE FOLLOWING AREAS IS A PLUS:
- Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime)
- Experience in lab testing of high-speed serial I/O, debug and data analysis techniques
- Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY)
- Skills in scripting and automation to enhance efficiency are highly desirable
Education & Experience
BSEE required with 3+ years of proven experience
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $138,900 and $256,500, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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