Qualcomm Wireless HW Design Architect FPGA/ASIC - Staff/Sr Staff 

India, Karnataka, Bengaluru 

675406195

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

Wireless HW Design Architect (FPGA/ASIC) - Staff/Sr Staff

As design architect, you will work on upcoming IEEE 802.11 (Wi-Fi) standards, architect and implement new features on FPGA. You will have opportunity to contribute to entire life cycle of technology from HW architecture, micro-architecture, RTL coding and targeting the design to FPGA. You will work closely with standards, algorithm and SW teams to implement and validate the features.

Skills & Experience

• MTech/BTech in Electronics & Communication Engineering with 8-13 years in defining architecture from spec, design, micro-architecture, RTL coding and mapping the design into FPGAs

• Proficient in Verilog, System-Verilog programming and VHDL (optional) languages

• Good experience in leading a small team with good mentoring skills

• Solid experience with FPGA design tools such as Xilinx Vivado is a must

• Strong knowledge of Xilinx latest FPGA families architecture

• Solid experience in HW infrastructure design and protocols like Ethernet and AMBA(APB/AHB/AXI/ACE) etc.

• Knowledge of signal processing concepts/algorithms and Wi-Fi standards (802.11a/b/g/n/ac/ax) is good to have

• Good experience in any scripting languages (Perl, Tcl, etc..)

• Good experience with ILA/Logic analyzer usage

• Strong debugging and problem-solving skills. Experience with pre & post-silicon bring-up and debug in lab is also a must.

• Able to work with teams across the globe and possess good communication skills

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Responsibilities

• Design, Micro-architecture design, RTL coding and development and its validation for linting, CDC rules.

• Work with SoC architect to define SoC level interfaces & System architect to define IP micro architecture.

• Work with functional verification team on test-plan development and debug.

• Creatively overcome obstacles, Invent, and file patents on technical solutions to relevant problems.

• Develop timing constraints, synthesize the RTL, perform Floor planning, Place & Route, Bit stream generation.

• Provide debugging support to Testing team and platform level debug.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.