Bachelor's degree in Electrical Engineering or equivalent practical experience
Experience with multiple SoCs with silicon success
Experience with chip design flow
Preferred qualifications:
Master's degree in Electrical Engineering or related field
Domain knowledge and expertise with Memory controller/DDR
Understanding of cross-domain involving domain validation, design for testing, physical design, and software
Proficiency with ASIC design methodologies for front quality checks like; Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation