Qualcomm Power Limits Management Architect Multiple Locations 

United States, California, San Diego 

670962750

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Skills/Experience

• 10+ years of strong experience in power and limits system

• Familiar with UPF and power domain crossing

• Experience in low power design methodology and clock domain crossing designs

• Proficient in Perl, Python scripting

• Expertise in post-Si debug is a plus

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range:

$142,500.00 - $247,000.00