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Microsoft Principal Power Performance Verification Architect 
United States, Washington 
66812355

Yesterday

eam is currently recruitingPrincipal Power and Performance Verification Architectwith a proven track record of delivering high quality results, leading to exceptional user experiences. As the subsystem lead for this team, you will provide detailed requirements and drive quality with our partners on their designsYou will seek to improve performance/power and battery life by working with Windows OS, first-party applications, and third-party components.

Principal Power and Performance Verification Architectis a leader in the hardware industry who has in-depth experience driving designs to meet timing requirements and power targets from the SoC level down to each unit. They will be responsible for creating a verification methodology, collaborating with and contributing to performance simulation and power delivery teams to model designs and drive partners’ silicon designs to convergence. The candidate will build a sustainable infrastructure to deliver exceptional experiences across our entire portfolio of future generation products. This role requires detail orientation and affinity to enable efficiencies in process and methodologies - from early interaction to our silicon, through guiding an engineering organization on user experiences to the final product release.


Required/Minimum Qualifications

  • 12+ years of technical engineering experience
    • OR Bachelor's degree in Electrical Engineering, Computer Engineering, or related field AND 10+ years of technical engineering experience
    • OR Master's degree in Electrical Engineering, Computer Engineering, or related field AND 8+ years of technical engineering experience
    • OR Doctorate degree in Electrical Engineering, Computer Engineering, or related field AND 3+ years of technical engineering experience.
  • 8+ years demonstrated experience in Architecture or Design Development of client subsystems.
  • 6+ years leading the performance and power verification of a client CPU or SoC.

Additional Or Preferred Qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field AND 12+ years of technical engineering experience
    • OR Master's degree in Electrical Engineering, Computer Engineering, or related field AND 10+ years of technical engineering experience.
  • 10+ years demonstrated experience in Architecture or Design Development of client subsystems.
  • 8+ years leading the performance and power verification of a client CPU or SoC.
  • Expertise in multiple domains as well as corresponding hardware, PCB, SoC, high speed link design, debug, and support experience
  • Experience with hands-on firmware debug
  • Familiarity with Windows Performance Analyzer andgood in analyzing ETL traces
  • Demonstratable knowledge of client computing SoC Architecture, requirements, and definition in order to understand how each domain fits optimally.
  • Expertise of domains’ operating systems and driver foundations, firmware and hardware components and their interactions leading to high quality designs that balance performance/power.
  • Outstanding interpersonal skills, cross-group and cross-culture collaboration.
  • Self-starter with demonstrated ability to perform in a high paced product development environment.
  • Capable of managing a great level of ambiguity and minimal direction to extract relevant goals while driving to completion.
  • Willing to travel internationally up to 10%.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

Responsibilities
  • Lead power and performance analysis. Measure, analyze, and debug workloads to identify power and performance issues and solve them.
  • Work with OS and software teams to develop workloads and create simulation traces.
  • Pre Silicon & Post Silicon power validation, debug and optimization by working with hardware, software, BIOS, and Firmware teams.
  • Analyze power modeling results to identify potential areas for power reduction and optimization.
  • Measure and analyze SoC and platform power on a rail-by-rail basis and debug any issues/gaps.
    • Understand overall SoC architecture and contribute to decisions based on IP capabilities, functionality, and value.
    • Contribute to the selection of IP and define IP goals that meet device product expectations and exceptional customer experiences while meeting schedule, quality, and cost commitments.
    • Embody our