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Microsoft Senior Design Verification Engineer 
United States, North Carolina, Raleigh 
642055087

16.07.2024

Required qualifications:

  • 7+ years of related technical engineering experience
    • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
    • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience
    • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • 5+ years of experience working on Computer Architecture and SoC design and verification principles, including:
    • Using industry standardHardware Description Languages(HDLs) like SystemVerilog
    • Developing and using UVM verification environments
    • Writing scripts/software with industry standard languages such as Python or C++

Other requirements:

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Preferred qualifications:

  • Verification, logic development, or validation experience as part of a CPU, SoC and/or IP development team.
  • Demonstrated experience in one or more of the following:
    • Coherent fabric interconnect, protocols, and IPs
    • CPU and system level caches
    • Peripheral Component Interconnect express(PCIe) Controller and protocols
    • Memory Controller and Double Data Rate(DDR) protocols
  • Knowledge of full chip and system level flows and protocols.
  • Effective communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

Microsoft will accept applications for the role until July 30, 2024.

Responsibilities
  • Establish yourself as an integral member of a pre-silicon verification team owning verification of SoC and integration of components and/or SoC level flows.
  • Become proficient on the SoC coherent fabric and its interaction with other Internet Protocol(IPs).
  • Develop verification strategy, testplans, requirements, environments, tools, and methodologies.
  • Define, document, and implement a from-scratch Universal Verification Methodology(UVM) verification environment including agents and scoreboards for a design.
  • Apply your knowledge of verification principles and techniques and your judgement to write test plans and implement them by developing tests, test generators, test benches, checkers, coverage, and other verification collateral.
  • Run tests, debug failures to root cause, and recommend fixes.
  • Apply your growth mindset to learn and adapt in a complex and dynamic environment.
  • Engage with partners to drive continuous improvement to both the design, to verification plans/collateral, and to methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably.
  • Mentor and coach team members
  • Apply your One Microsoft mentality to collaborate with and influence architects, logic designers, post-silicon validators, other verification engineers, and IP and tool providers.
  • Other
    • Embody our and