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You should have at least 10 years of Analog Mask Layout execution and IP delivery of medium-large complexity designs. You must have 5 plus years of Managerial / Execution Lead experience, including day-to-day task coordination and overall delivery responsibilities.
You have delivered Analog Layouts successfully in mass production.
You have detailed knowledge of EDA tools for Cadence, Mentor, Synopsys, including advanced SDL.
You have experience with layout of high-performance analog blocks such as VCOs, Charge-Pumps, Interpolators, BandGap, OTAs, PLLs, Data Converters, LDOs, RX/TX blocks, references and other foundational analog blocks.
In-depth knowledge of analog design and layout guidelines for high-performance, high-speed and/or low-power designs. You have experience with floor-planning, block-level routing and large macro level assemblies.
You have knowledge of analog layout techniques such as common-centroid layout, matching, symmetrical layouts, signal shielding, use of dummy devices, thermal aware layouts with consideration for EM/IR and other analog specific guidelines.
You have worked in deep finfet design nodes.
You are a self-starter with the ability to define and adhere to a schedule.
Responsibilities
The primary responsibility of this position is to manage an Analog Mask Layout Design Team and execute Analog Mask Layout of cutting edge, high-performance, high-speed, low-power IP designs for interconnectivity solutions and fundamental Analog circuit blocks for various products for Microsoft in various process nodes including deep FinFet, following industry best practices.
Build, grow and maintain a high-performing, high-quality Analog Mask Layout Design Team. Build the team, create a long-term charter and purpose for the team. You will be responsible for all hiring of employees and managing their day-to-day activities.
Manage on-boarding/offboarding of additional external contingent staff to supplement existing team for overflow
You are proficient in the use of Cadence Virtuoso (or other equivalent) design tools and flows and will perform and supervise layout implementation of analog intensive IP’s. You will establish flows/methodologies/processes for execution along with peers.
You will manage the execution of an Analog Mask Layout team for delivery of responsible IP’s, including project planning, schedule tracking, report generation, day-to-day management of execution.
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