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NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people.
What you will be doing
Creating proofs-of-concept to evaluate and motivate extensions in AI Frameworks (PyTorch/NEMO), HPC programming models (MPI, OpenSHMEM, PGAS), new runtime designs, and new network hardware features.
Research, design and implement features for AI and HPC communication middleware (NCCL, Open MPI, UCX, UCC, NVSHMEM), and Deep Learning frameworks such as TensorFlow/Pytorch.
Review , design, and implement features to enhance compiler features to support the NVIDIA networking ecosystem.
Research, design and develop hardware features relevant to scientific, Deep learning, and data-intensive workloads.
What we need to see
Ph.D, Masters, or Bachelors in, in computer science, computer engineering, or a closely related field or equivalent experience.
8+ years of experience in parallel programming models, and/or network architecture.
Background in algorithm design, system programming, and computer architecture
Strong programming and software development skills
Ability and flexibility to work and communicate effectively in a multi-national, multi-time-zone corporate environment
Ways to stand out from the crowd:
Deep understanding of technology and passion for what you do
Strong collaborative and interpersonal skills, specifically a proven ability to effectively guide and influence within a dynamic matrix environment
Background with designing communication middleware for high-performance computing systems, including InfiniBand, DPUs, Ethernet, and Shared Memory
Experience developing and implementing features for compilers, optimizations for compilers, particularly Clang/LLVM, and NVIDIA compilers and experience implementing communications libraries, particularly MPI, OpenSHMEM, NCCL, NVSHMEM, UCX, UCC, or PGAS
Background with CUDA programming and NVIDIA GPUs and programming models for emerging architectures including hierarchical heterogeneous memory systems and accelerators.
You will also be eligible for equity and .
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