Nvidia ASIC Design Engineer 

United States, California 

634725786

As a member of our Memory Subsystem Design team, you will collaborate with architects, software engineers, and circuit designers to and deliver a world-class solution. NVIDIA SOC Interconnects are among the industry's most sophisticated because of the complex area, latency, power, bandwidth and quality-of-service requirements.

In this position, you will have the opportunity to be responsible for the micro-architecture and design including RTL design, synthesis, functional verification and timing analysis using innovative CAD tools and using the latest process technologies.

BS (or equivalent experience) in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD) a plus.

3+ years of relevant industry experience and a background in high-speed coherent interconnects, protocol bridges, hardware-managed coherency and system level caches.

Experience with multiple clock domains and asynchronous interfaces

Knowledge of industry specifications like CHI/AXI/CXL/PCI-E is a plus.

Knowledge of DRAM controllers is a plus.

Experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing analysis, floor planning, ECO, bringup & lab debug, and ATE test development.

Strong working knowledge of Verilog or VHDL.

Familiarity with board and system level issues.

Programming skills in C and/or PERL.

Good communication skills and interpersonal skills are required. A history of mentoring junior engineers and interns is a huge plus.