Bachelor's degree in Electronics or Computer Engineering/Science, or equivalent practical experience.
8 years of experience with SoC power modeling and analysis.
Experience with SOC architecture and power techniques.
Preferred qualifications:
Master's degree or PhD in Electronics, Computer Engineering, or Computer Science.
Experience with ASIC design flows.
Experience with low power architecture and power optimization techniques (e.g., multi Vth/power/voltage domain design, clock gating, power gating, Dynamic Voltage Frequency Scaling).