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Job Area:
Engineering Group, Engineering Group > Hardware Engineering
General Summary:
Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM .
Exposure to Version managers like Clearcase/perforce ,Scripting language like Perl, Tcl or Python .
Strong Analytical and Debugging skills .
Exposure to Low Power Design Verification including Power Aware , WLAN/Wireless communications.
Verification of mixed-signal ICs such as PMUs, Phase lock loops (PLL), ADCs, DACs, LDOs, and radio architectures.
Familiarity with Formal verification (Jasper, VC formal) . Verification of CPU/Memory subsystems, Gate level Simulations including 0-delay , PA and Timing simulations.
Strong knowhow on digital Logic verification and principles, Low power architecture , Clock gating/multi-domain clocking , Understanding of Low speed/High speed peripherals, Performance verification and system level usecase understanding, Strong knowhow of AMBA bus protocols such as AHB and AXI , Debug datapath fundamentals (CTI/ATB/NTS) , Security based verification.
Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
Preferred qualification : 12+ years Hardware Verification experience including track record of strong individual contribution across multiple domains
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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