Amazon Senior Power Optimization Engineer Annapurna Labs 

United States, Texas, Austin 

604405516

As a member of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the entire SoC power rollup, performing power analysis at various stages of the design, and developing power optimization techniques from SoC to complete system. These systems include accelerators such as AWS Inferentia and AWS Trainium which are machine learning products designed to deliver high performance at low cost.You’ll provide leadership in the application of new technologies to large scale deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you’ll work with thought-leaders in multiple technology areas. You’ll have high standards for yourself and everyone you work with, and you’ll be constantly looking for ways to improve our products' performance, quality and cost. We’re changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.Key job responsibilities
- Full ownership of SOC power – early estimation to signoff
- Developing early power models and extracting power estimation for new SoCs
- Developing power mitigation techniques at the microarchitecture level
- Running RTL level power analysis tools and looking for power savings opportunities at architectural and micro-architectural level
- Running vector and vectorless power analysis to get accurate average and peak power numbers during SoC development
- Working with emulation and application software teams to get application specific power numbers using emulation power analysis flows during the SoC development
- Reviewing and giving feedback on Electromigration, IR drop, and Power Integrity analysis at the die, package, and PCB levels
- Providing inputs for thermal analysis and reviewing and giving feedback on thermal analysis results for the die, package, PCB, and system
- Using lab equipment to perform power validation on new silicon and correlation to pre-silicon models.

- BS degree or higher in EE or CE
- 8+ years or more of SoC development experience
- Previous experience owning SoC power modeling and optimization for entire SoC
- Previous experience managing (directly or indirectly) a team
- Knowledge of power savings techniques and experience with optimizing SoCs to lower power dissipation
- Experience running and expertise of sign-off power analysis tools
- Must be proficient with TCL scripting
- Must work well with others on cross-functional teams and must be able to multi-task

- RTL level power analysis tool expertise
- Experience with emulator power analysis flows
- Experience using lab equipment for silicon and system validation
- Process and circuit design knowledge
- Experience analyzing power for high power chips
- Proficient writing Verilog RTL
- Proficient writing other scripting languages such as Python or Perl
- Experience with electro-migration, IR drop, power integrity, thermal analysis is desired
- General knowledge of Machine Learning, Computer Arithmetic, Server/Datacenter Architecture