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Google Design Testability Engineer Silicon 
India, Karnataka, Bengaluru 
601675864

22.07.2024
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering or equivalent practical experience.
  • 3 years of experience in Physical Design.
  • Experience in sign-off convergence, including STA, electrical checks and physical verification.
  • Experience in one or more synthesis/PnR tools (e.g., Genus, Innovus, DC, ICC).

Preferred qualifications:
  • Experience in computer architecture.
  • Knowledge of Verilog/SystemVerilog.
  • Understanding of circuit design, device physics and deep sub micron technology.
  • Excellent scripting skills with languages such as Python, TCL, or Perl.