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Cisco Senior Design Engineer 
Switzerland, Zurich 
570559863

28.07.2025
What You'll Do

You'll be joining a team of world-class circuit designers and will work on communication circuits using state-of-the art CMOS FinFet technologies with feature sizes of 3nm and below.

You will be responsible for supporting design flows with leading industry design tools as well as finding, analyzing and implementing innovative circuit designs for high-speed wireline SerDes IP blocks. You will develop, optimize and verify these circuits in both schematic and layout, as well as characterize the manufactured devices in measurements.

Who You'll Work With

The team you will work with has an outstanding history in delivering innovative ideas and world-leading circuit solutions in silicon, which is manifested by a long track record of publications and contributions to products in the past.

Our devices are designed to be universally adaptable across AI, service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.

Minimum Qualifications:
  • Electrical engineer with 10+ years’ experience in high-speed wireline SerDes design.
  • EE degree from an excellent university
  • Expertise with Cadence Virtuoso CAD design environment– including custom layout, DRC, LVS, and parasitic extraction
  • In-depth knowledge of version and project management tools such as SOS and Jira
  • Custom analog and mixed-signal circuit design expertise in CMOS, ideally with experience in 5nm or smaller CMOS FinFet technologies
Advantageous
  • Good team player
  • You should be eager to learn and succeed!
  • Basic knowledge of signal processing and communication systems
  • Experience with measurement equipment
  • Programming skills with: Skill, VerilogA, Tcl, Perl, Python, Matlab, C
  • Experience with other CAD tools (Siemens/Mentor, Synopsis)
  • Experience with digital design flow and tools for synthesis and P&R
  • Experience with coil design using EM field simulator such as EMX, Momentum and HFSS
  • Knowledge of packaging technology